1. Field of the Invention
The present invention relates to techniques for improving the performance of computer systems. More specifically, the present invention relates to a method and an apparatus for selectively performing lookups for cache lines in a computer system.
2. Related Art
Virtually all modern computer systems include a memory hierarchy that contains one or more levels of cache along with random-access memory (RAM) for storing instructions and data. For example, many computer systems include a processor chip with on-die L1 and L2 caches which communicate with off-chip main memory (i.e., random-access memory (RAM)).
In such computer systems, when performing a lookup for a cache line, if the cache line is not present in the cache, the lookup is forwarded to the next level of the memory hierarchy. For example, if a cache line is not present in the L2 cache, the lookup is forwarded to the main memory. Unfortunately, forwarding lookup requests consumes memory-system bandwidth. In addition, because a lookup request takes a longer time to return from higher levels of the memory hierarchy, forwarding such requests to higher levels of the memory hierarchy increases the latency of the memory access.